`include "PRV564Config.v"
`include "PRV564Define.v"
module L1_AQBuf
#(
    parameter L1IBUF=1'b1
)
(
    input  wire             GLB_CLKi,
    input  wire             GLB_RSTi,      
    input  wire             AQi_V,
    input  wire [7:0]       AQi_ID,
    input  wire [7:0]       AQi_CMD,
    input  wire [15:0]      AQi_BSEL,
    input  wire             AQi_CI,
    input  wire             AQi_WT,
    input  wire [127:0]     AQi_WDATA,
    input  wire [`PADR-1:0] AQi_ADDR,
    output wire             AQi_FULLo,

    output wire             AQo_V,
    output wire [7:0]       AQo_ID,
    output wire [7:0]       AQo_CMD,
    output wire [15:0]      AQo_BSEL,
    output wire             AQo_CI,
    output wire             AQo_WT,
    output wire [127:0]     AQo_WDATA,
    output wire [`PADR-1:0] AQo_ADDR,
    input  wire             AQo_FREE

);
localparam DATAWID=(L1IBUF)?(2+32+`PADR):(2+32+128+`PADR);
wire [DATAWID-1:0]rdata,wdata;
wire empty;
assign AQo_V=!empty;
generate 
    if(L1IBUF)
    begin : BUFFER_WITHOUT_WDATA
        assign wdata={AQi_ADDR,AQi_BSEL,AQi_CMD,AQi_ID,AQi_WT,AQi_CI};
        assign {AQo_ADDR,AQo_BSEL,AQo_CMD,AQo_ID,AQo_WT,AQo_CI}=rdata;
        assign AQo_WDATA=128'hx;
    end
    else 
    begin : BUFFER_WITH_WDATA
        assign wdata={AQi_WDATA,AQi_ADDR,AQi_BSEL,AQi_CMD,AQi_ID,AQi_WT,AQi_CI};
        assign {AQo_WDATA,AQo_ADDR,AQo_BSEL,AQo_CMD,AQo_ID,AQo_WT,AQo_CI}=rdata;
    end
endgenerate

SyncFIFO#(
    .DWID(DATAWID),
    .DDEPTH(4)
)AQBuf(
    .clk(GLB_CLKi),
    .rst(GLB_RSTi),
    .ren(AQo_FREE),
    .wen(AQi_V),
    .wdata(wdata),
    .rdata(rdata),
    .full(AQi_FULLo),
    .empty(empty)
);

endmodule
